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Workaround for L3 cache detection of Ryzen 3000

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This code is planned to get refactored or removed anyway, so just do a
cheap workaround.

Reviewed by: Imarok
Fixes: #4360
Differential Revision: https://code.wildfiregames.com/D2353
This was SVN commit r23262.
This commit is contained in:
Imarok 2019-12-19 16:52:47 +00:00
parent 72fc4105e2
commit 4171d62d1b
1 changed files with 2 additions and 1 deletions
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3
source/lib/sysdep/arch/x86_x64/cache.cpp
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@ -89,7 +89,8 @@ static x86_x64::Cache L1Cache(u32 reg, x86_x64::Cache::Type type)
static const size_t associativityTable[16] =
{
0, 1, 2, 0, 4, 0, 8, 0,
16, 0, 32, 48, 64, 96, 128, x86_x64::Cache::fullyAssociative
// TODO: The second '16' does not obey to the specifications and is only a workaround. For a correct implementation please look here: https://community.amd.com/thread/244207
16, 16, 32, 48, 64, 96, 128, x86_x64::Cache::fullyAssociative
};
static x86_x64::Cache L2Cache(u32 reg, x86_x64::Cache::Type type)